• 歡迎光臨東莞市飛江電子科技有限公司官網!
    全國咨詢熱線

    13926563901

    18925580829

    飛江淘寶店鋪

    首頁>技術資料>51單片機

    cc1101的詳解及單片機程序

    發布時間:2018-03-26   瀏覽量:

    1.初始化SPI,MCU各引腳。

        
            當有數據接收或發送狀態聲明時,有中斷和查詢兩種方式。GDO0與GDO2引腳輸出至MCU引腳,若要用中斷則要接至MCU外部中斷引腳,查詢時則可用GPIO。
     
        2.復位CC1101。
     
        3.初始化CC1101。(寫操作時可從SO中讀出CC1101狀態)
     
            初始化后CC1100為IDLE狀態.
        
        4.狀態機轉換,寫/讀FIFO數據。
     
            每次寫操作時SO返回的值為寫操作前的CC1100狀態值,具體值見Table20;讀狀態命令為當前CC1100狀態值,具體值見寄存器0X35說明;注意兩者區別。
     
    快速認識Cc1100
     
                 Cc1100可以工作在同步模式下,代價是:MCU自己控制前導碼。本系統中,Cc1100將工作在異步模式下。
      
    知識點
     
                 Head Byte:在 引腳 Cc1100.Csn 有效后,通過SPI總線寫入 Cc1100的第一個字節。
     
                 Status Byte: 在寫入 HeadByte 的同時,MCU 得到 Status Byte。
     
                 Burst Bit:在 Head Byte 中的一個 Bit, 有效值=="1",無效值=="0"
     
    GDO0:
                 GDO0可用作FIFO狀態輸出,載波感應(CS),時鐘輸出,GDO0 腳也能用作集成于芯片的模擬溫度傳感器(未用).配置寄存器為IOCFG0(0X02),現在配置為RX模式下數據狀態反應輸出.
     
    GDO1:
                 GDO1與SPI的SO共用引腳,默認狀態下為3態,當CSn為低電平時,此引腳SPI的SO功能生效。配置寄存器為IOCFG0(0X01),現在配置為空閑狀態下3態,SPI模式下SO.
     
    GDO2:
     
                 GDO2可用作FIFO狀態輸出,載波感應(CS),時鐘輸出,配置寄存器為IOCFG0(0X00),現在配置為載波感應(CS)輸出.
     
    TXOFF_MODE/RXOFF_MODE:
     
                 注意,此配置為在數據包被發送/接收后狀態機狀態決定位,僅是在發生發送或者接收后動作;當為IDLE時發SRX/STX后狀態機不按此配置運行。TX/RX后要校準。
     
    功率放大控制(PATABLE):
     
                 0X3E為功率寫入地址,0X22為為功率配置寄存器。PATABLE 是一個8字節表,定義了8個PA 功率值。這個表從最低位(0)到最高位(7)可讀和寫,一次一位。一個索引計數器用來控制對這個表的訪問。
     
                 每讀出或寫入表中的一個字節,計數器就加 1。當 CSn 為高時,計數值置為最小值。當達到最大值時,計數器由零重新開始計數。
        
                 FREND0.PA_POWER(2:0)從8個功率值中選擇1個,且振幅為相應數等級。
     
     
    異步模式:
                 在此模式下,CC1101中的MCU的若干支持機制會停用,包括數據包硬件處理,FIFO 緩沖,數據白化,交錯(interleaver)和前向糾錯(FEC) ,曼徹斯特編碼(Manchester encoding);
     
                 MSK不支持異步模式;
     
                 PKTCTRL0.PKT_FORMAT == 3 使能異步模式,GDO0為input,GDO0, GDO1或GDO2為output 相應配置位為IOCFG0.GDO0_CFG, IOCFG1.GDO1_CFG IOCFG2.GDO2_CFG;
     
    電磁波激活(WOR):
     
                 在WOR濾波使用之前RC振蕩器必須啟用,RC振蕩器是 WOR 定時器的時鐘源.在WOR下,收到信號后會自動進入RX模式.
     
    載波感應(CS)與RSSI:
     
                 因此兩配置相互有連系,所以一起論述.
     
                 RSSI 只能在RX模式下才能有效,作用為對當前信號質量評估,信號質量可從RSSI寄存器讀出.RSSI信號強度可從0X34取出.
     
                 RSSI(信號強度)計算公式: 注:此為433M下,結果為負數,
     
                                                RSSI_dBm=(RSSI-256)/2-74 (RSSI>=128)
     
                                                RSSI_dBm= (RSSI/2)-74      (RSSI<128)
     
                 CS 只在RX模式下才能有效,當信號質量高于設定門限值時,CS狀態將會被聲明。現在配置為GDO2輸出感應狀態.
     
                 CS門限值由以下4個寄存器決定
     
                 ?? AGCCTRL2.MAX_LNA_GAIN  
                 ?? AGCCTRL2.MAX_DVGA_GAIN
                 ?? AGCCTRL1.CARRIER_SENSE_ABS_THR
                 ?? AGCCTRL2.MAGN_TARGET
                 
                 CS門限值計算公式:     表默認門限值 + (MAGN_TARGET-33) + CARRIER_SENSE_ABS_THR.
     
                                               表默認門限值見table29,table30. 由AGCCTRL2.MAX_LNA_GAIN   AGCCTRL2.MAX_DVGA_GAIN 決定.
     
                                              默認門限值表只給了兩個數據速率下的值,其余由自己測.我們對此要求不是太高,可以參考用這個表.
     
                                               CARRIER_SENSE_ABS_THR為對應表中-7~7的值,最后單位為dBm.
     
                                               Example:
     
                                                             在250K下AGCCTRL2.MAX_LNA_GAIN = 00   AGCCTRL2.MAX_DVGA_GAIN = 00 得出表中為-90.5
     
                                                              MAGN_TARGET = 7(42), CARRIER_SENSE_ABS_THR = 1(1)
     
                                                             門限為-90.5 + (42-33) + 1= -82.5dBm            
     
    清理信道訪問(CCA):

                 清理信道訪問用來指示當前信號是空閑還是忙。當忙時是否丟棄當前數據,寄存器MCSM1.CCA_MODE決定是否丟棄.默認配置為保留當前寄存器中數據,丟棄下一步要處理數據.

     

    數據FIFO:

              

     
                 當TX操作時,由MCU控制,溢出時CC1101出錯;當RX操作時,讀空時CC1101出錯
     
                 RX FIFO 和 TX FIFO 中的字節數也能分別從狀態寄存器 RXBYTES.NUM_RXBYTES和TXBYTES.NUM_TXBYTES 中讀出
     
                 4 位 FIFOTHR.FIFO_THR 設置用來控制FIFO 門限點
     
                 讀單字節時,,CSn繼續保持低;。突發訪問方式允許一地址字節,然后是連續的數據字節,直到通過設置 CSn 為高來斷訪問
                
                 當寫操作時,最后一個字節被傳送至 SI 腳后, 被 SO腳接收的狀態位會表明在 TX FIFO中只有一個字節是空閑,
     
    寄存器分類
             
      Configration Registers

    共47個,可讀,可寫

    0x00~0x2E

       
      Status Registers

    共14個,只讀

    0x30~0x3D

       
      Command Strobe

    共14個,只寫

    尋址空間:0x30~0x3D

     

    14個地址,對相應的地址進行寫,

    就相當于激活了對應的命令

    本系統是用到的Strobe:

    CC1100_STROBE_RESET
    CC1100_STROBE_ENTER_RX_MODE
    CC1100_STROBE_ENTER_TX_MODE
    CC1100_COMMAND_STROBE_SIDLE
    CC1100_COMMAND_STROBE_SFRX

     
      TX FIFO 共64個,只寫    
      RX FIFO 共64個,只讀    
             
     
     
    Status(Command)Registers操作:
     
         當地址為0X30~0X3D時
     
         burst為1:對Status Registers的操作
     
                       Status Registers只可讀,且只能一次讀一個字節,不可寫                 
         burst為0:對Command Registers操作
     
                     寄存器的訪問和一個寄存器的操作一樣,但沒有數據被傳輸.寫完畢后,CC1100便執行相應操作.
     
     
     
     
         讀寫FIFO,有兩種模式:單字節讀寫;Burst讀寫。
             單字節讀寫時序:
                 1 Cc1100.Csn有效。
                 2 寫入Head Byte。
                  3 讀、寫一個1字節。
                 4 Cc1100.Csn無效。
    #include 
    #include 
    #define  INT8U  unsigned char
    #define  INT16U  unsigned int
    #define  WRITE_BURST      0x40      //連續寫入
    #define  READ_SINGLE      0x80      //讀
    #define  READ_BURST       0xC0      //連續讀
    #define  BYTES_IN_RXFIFO     0x7F        //接收緩沖區的有效字節數
    #define  CRC_OK              0x80       //CRC校驗通過位標志
    //*****************************************************************************************
    sbit  GDO0 =P1^3;
    sbit  GDO2 =P3^2;
    sbit MISO =P1^6;
    sbit MOSI =P1^5;
    sbit SCK =P1^7;
    sbit CSN =P1^2;
    //*****************************************************************************************
    sbit    LED2    =P3^4;
    sbit    LED1    =P3^5;
    sbit    KEY1    =P3^6;
    sbit    KEY2    =P3^7;
    //*****************************************************************************************
    sbit led3=P2^3;
    sbit led2=P2^2;
    sbit led1=P2^1;
    sbit led0=P2^0;
    //*****************************************************************************************
    //INT8U PaTabel[8] = {0x60 ,0x60 ,0x60 ,0x60 ,0x60 ,0x60 ,0x60 ,0x60};
    INT8U PaTabel[8] = {0xc0 ,0xc0 ,0xc0 ,0xc0 ,0xc0 ,0xc0 ,0xc0 ,0xc0};//修改發射功率
    //*****************************************************************************************
    void SpiInit(void);
    void CpuInit(void);
    void RESET_CC1100(void);
    void POWER_UP_RESET_CC1100(void);
    void halSpiWriteReg(INT8U addr, INT8U value);
    void halSpiWriteBurstReg(INT8U addr, INT8U *buffer, INT8U count);
    void halSpiStrobe(INT8U strobe);
    INT8U halSpiReadReg(INT8U addr);
    void halSpiReadBurstReg(INT8U addr, INT8U *buffer, INT8U count);
    INT8U halSpiReadStatus(INT8U addr);
    void halRfWriteRfSettings(void);
    void halRfSendPacket(INT8U *txBuffer, INT8U size);
    INT8U halRfReceivePacket(INT8U *rxBuffer, INT8U *length); 
    //*****************************************************************************************
    // CC1100 STROBE, CONTROL AND STATUS REGSITER
    #define CCxxx0_IOCFG2       0x00        // GDO2 output pin configuration
    #define CCxxx0_IOCFG1       0x01        // GDO1 output pin configuration
    #define CCxxx0_IOCFG0       0x02        // GDO0 output pin configuration
    #define CCxxx0_FIFOTHR      0x03        // RX FIFO and TX FIFO thresholds
    #define CCxxx0_SYNC1        0x04        // Sync word, high INT8U
    #define CCxxx0_SYNC0        0x05        // Sync word, low INT8U
    #define CCxxx0_PKTLEN       0x06        // Packet length
    #define CCxxx0_PKTCTRL1     0x07        // Packet automation control
    #define CCxxx0_PKTCTRL0     0x08        // Packet automation control
    #define CCxxx0_ADDR         0x09        // Device address
    #define CCxxx0_CHANNR       0x0A        // Channel number
    #define CCxxx0_FSCTRL1      0x0B        // Frequency synthesizer control
    #define CCxxx0_FSCTRL0      0x0C        // Frequency synthesizer control
    #define CCxxx0_FREQ2        0x0D        // Frequency control word, high INT8U
    #define CCxxx0_FREQ1        0x0E        // Frequency control word, middle INT8U
    #define CCxxx0_FREQ0        0x0F        // Frequency control word, low INT8U
    #define CCxxx0_MDMCFG4      0x10        // Modem configuration
    #define CCxxx0_MDMCFG3      0x11        // Modem configuration
    #define CCxxx0_MDMCFG2      0x12        // Modem configuration
    #define CCxxx0_MDMCFG1      0x13        // Modem configuration
    #define CCxxx0_MDMCFG0      0x14        // Modem configuration
    #define CCxxx0_DEVIATN      0x15        // Modem deviation setting
    #define CCxxx0_MCSM2        0x16        // Main Radio Control State Machine configuration
    #define CCxxx0_MCSM1        0x17        // Main Radio Control State Machine configuration
    #define CCxxx0_MCSM0        0x18        // Main Radio Control State Machine configuration
    #define CCxxx0_FOCCFG       0x19        // Frequency Offset Compensation configuration
    #define CCxxx0_BSCFG        0x1A        // Bit Synchronization configuration
    #define CCxxx0_AGCCTRL2     0x1B        // AGC control
    #define CCxxx0_AGCCTRL1     0x1C        // AGC control
    #define CCxxx0_AGCCTRL0     0x1D        // AGC control
    #define CCxxx0_WOREVT1      0x1E        // High INT8U Event 0 timeout
    #define CCxxx0_WOREVT0      0x1F        // Low INT8U Event 0 timeout
    #define CCxxx0_WORCTRL      0x20        // Wake On Radio control
    #define CCxxx0_FREND1       0x21        // Front end RX configuration
    #define CCxxx0_FREND0       0x22        // Front end TX configuration
    #define CCxxx0_FSCAL3       0x23        // Frequency synthesizer calibration
    #define CCxxx0_FSCAL2       0x24        // Frequency synthesizer calibration
    #define CCxxx0_FSCAL1       0x25        // Frequency synthesizer calibration
    #define CCxxx0_FSCAL0       0x26        // Frequency synthesizer calibration
    #define CCxxx0_RCCTRL1      0x27        // RC oscillator configuration
    #define CCxxx0_RCCTRL0      0x28        // RC oscillator configuration
    #define CCxxx0_FSTEST       0x29        // Frequency synthesizer calibration control
    #define CCxxx0_PTEST        0x2A        // Production test
    #define CCxxx0_AGCTEST      0x2B        // AGC test
    #define CCxxx0_TEST2        0x2C        // Various test settings
    #define CCxxx0_TEST1        0x2D        // Various test settings
    #define CCxxx0_TEST0        0x2E        // Various test settings
    // Strobe commands
    #define CCxxx0_SRES         0x30        // Reset chip.
    #define CCxxx0_SFSTXON      0x31        // Enable and calibrate frequency synthesizer (if MCSM0.FS_AUTOCAL=1).
                                            // If in RX/TX: Go to a wait state where only the synthesizer is
                                            // running (for quick RX / TX turnaround).
    #define CCxxx0_SXOFF        0x32        // Turn off crystal oscillator.
    #define CCxxx0_SCAL         0x33        // Calibrate frequency synthesizer and turn it off
                                            // (enables quick start).
    #define CCxxx0_SRX          0x34        // Enable RX. Perform calibration first if coming from IDLE and
                                            // MCSM0.FS_AUTOCAL=1.
    #define CCxxx0_STX          0x35        // In IDLE state: Enable TX. Perform calibration first if
                                            // MCSM0.FS_AUTOCAL=1. If in RX state and CCA is enabled:
                                            // Only go to TX if channel is clear.
    #define CCxxx0_SIDLE        0x36        // Exit RX / TX, turn off frequency synthesizer and exit
                                            // Wake-On-Radio mode if applicable.
    #define CCxxx0_SAFC         0x37        // Perform AFC adjustment of the frequency synthesizer
    #define CCxxx0_SWOR         0x38        // Start automatic RX polling sequence (Wake-on-Radio)
    #define CCxxx0_SPWD         0x39        // Enter power down mode when CSn goes high.
    #define CCxxx0_SFRX         0x3A        // Flush the RX FIFO buffer.
    #define CCxxx0_SFTX         0x3B        // Flush the TX FIFO buffer.
    #define CCxxx0_SWORRST      0x3C        // Reset real time clock.
    #define CCxxx0_SNOP         0x3D        // No operation. May be used to pad strobe commands to two
                                            // INT8Us for simpler software.
    #define CCxxx0_PARTNUM      0x30
    #define CCxxx0_VERSION      0x31
    #define CCxxx0_FREQEST      0x32
    #define CCxxx0_LQI          0x33
    #define CCxxx0_RSSI         0x34
    #define CCxxx0_MARCSTATE    0x35
    #define CCxxx0_WORTIME1     0x36
    #define CCxxx0_WORTIME0     0x37
    #define CCxxx0_PKTSTATUS    0x38
    #define CCxxx0_VCO_VC_DAC   0x39
    #define CCxxx0_TXBYTES      0x3A
    #define CCxxx0_RXBYTES      0x3B
    #define CCxxx0_PATABLE      0x3E
    #define CCxxx0_TXFIFO       0x3F
    #define CCxxx0_RXFIFO       0x3F
    // RF_SETTINGS is a data structure which contains all relevant CCxxx0 registers
    typedef struct S_RF_SETTINGS
    {
        INT8U FSCTRL2;   //自已加的
        INT8U FSCTRL1;   // Frequency synthesizer control.
        INT8U FSCTRL0;   // Frequency synthesizer control.
        INT8U FREQ2;     // Frequency control word, high INT8U.
        INT8U FREQ1;     // Frequency control word, middle INT8U.
        INT8U FREQ0;     // Frequency control word, low INT8U.
        INT8U MDMCFG4;   // Modem configuration.
        INT8U MDMCFG3;   // Modem configuration.
        INT8U MDMCFG2;   // Modem configuration.
        INT8U MDMCFG1;   // Modem configuration.
        INT8U MDMCFG0;   // Modem configuration.
        INT8U CHANNR;    // Channel number.
        INT8U DEVIATN;   // Modem deviation setting (when FSK modulation is enabled).
        INT8U FREND1;    // Front end RX configuration.
        INT8U FREND0;    // Front end RX configuration.
        INT8U MCSM0;     // Main Radio Control State Machine configuration.
        INT8U FOCCFG;    // Frequency Offset Compensation Configuration.
        INT8U BSCFG;     // Bit synchronization Configuration.
        INT8U AGCCTRL2;  // AGC control.
        INT8U AGCCTRL1;  // AGC control.
        INT8U AGCCTRL0;  // AGC control.
        INT8U FSCAL3;    // Frequency synthesizer calibration.
        INT8U FSCAL2;    // Frequency synthesizer calibration.
        INT8U FSCAL1;    // Frequency synthesizer calibration.
        INT8U FSCAL0;    // Frequency synthesizer calibration.
        INT8U FSTEST;    // Frequency synthesizer calibration control
        INT8U TEST2;     // Various test settings.
        INT8U TEST1;     // Various test settings.
        INT8U TEST0;     // Various test settings.
        INT8U IOCFG2;    // GDO2 output pin configuration
        INT8U IOCFG0;    // GDO0 output pin configuration
        INT8U PKTCTRL1;  // Packet automation control.
        INT8U PKTCTRL0;  // Packet automation control.
        INT8U ADDR;      // Device address.
        INT8U PKTLEN;    // Packet length.
    } RF_SETTINGS;
    /////////////////////////////////////////////////////////////////
    const RF_SETTINGS rfSettings =
    {
     0x00,
        0x08,   // FSCTRL1   Frequency synthesizer control.
        0x00,   // FSCTRL0   Frequency synthesizer control.
        0x10,   // FREQ2     Frequency control word, high byte.
        0xA7,   // FREQ1     Frequency control word, middle byte.
        0x62,   // FREQ0     Frequency control word, low byte.
       
     0x5B,   // MDMCFG4   Modem configuration.
     //0xf6, // MDMCFG4 chang by allen
        0xF8,   // MDMCFG3   Modem configuration. 
     //0x83, // MDMCFG3 chang by allen   data rate = 2.398K
        0x03,   // MDMCFG2   Modem configuration.
        0x22,   // MDMCFG1   Modem configuration.
        0xF8,   // MDMCFG0   Modem configuration.
        0x00,   // CHANNR    Channel number.
        0x47,   // DEVIATN   Modem deviation setting (when FSK modulation is enabled).
        0xB6,   // FREND1    Front end RX configuration.
        0x10,   // FREND0    Front end RX configuration.
        0x18,   // MCSM0     Main Radio Control State Machine configuration.
        0x1D,   // FOCCFG    Frequency Offset Compensation Configuration.
        0x1C,   // BSCFG     Bit synchronization Configuration.
        0xC7,   // AGCCTRL2  AGC control.
        0x00,   // AGCCTRL1  AGC control.
        0xB2,   // AGCCTRL0  AGC control.
        0xEA,   // FSCAL3    Frequency synthesizer calibration.
        0x2A,   // FSCAL2    Frequency synthesizer calibration.
        0x00,   // FSCAL1    Frequency synthesizer calibration.
        0x11,   // FSCAL0    Frequency synthesizer calibration.
        0x59,   // FSTEST    Frequency synthesizer calibration.
        0x81,   // TEST2     Various test settings.
        0x35,   // TEST1     Various test settings.
        0x09,   // TEST0     Various test settings.
        0x0B,   // IOCFG2    GDO2 output pin configuration.
        0x06,   // IOCFG0D   GDO0 output pin configuration. Refer to SmartRF?Studio User Manual for detailed pseudo register explanation.
        0x04,   // PKTCTRL1  Packet automation control.
        //0x05,   // PKTCTRL0  Packet automation control.
     0x01, //PKTCTRL0  crc disable chang by allen at 09.12.24
        0x00,   // ADDR      Device address.
        0x0c    // PKTLEN    Packet length.
    };
    //*****************************************************************************************
    //函數名:delay(unsigned int s)
    //輸入:時間
    //輸出:無
    //功能描述:普通廷時,內部用
    //*****************************************************************************************  
    static void delay(unsigned int s)
    {
     unsigned int i;
     for(i=0; i sync transmitted
        while (!GDO0);
        // Wait for GDO0 to be cleared -> end of packet
        while (GDO0);
     halSpiStrobe(CCxxx0_SFTX);
     delay(20);
    }
    
    void setRxMode(void)
    {
        halSpiStrobe(CCxxx0_SRX);  //進入接收狀態
    }
    /*
    // Bit masks corresponding to STATE[2:0] in the status byte returned on MISO
    #define CCxx00_STATE_BM                 0x70
    #define CCxx00_FIFO_BYTES_AVAILABLE_BM  0x0F
    #define CCxx00_STATE_TX_BM              0x20
    #define CCxx00_STATE_TX_UNDERFLOW_BM    0x70
    #define CCxx00_STATE_RX_BM              0x10
    #define CCxx00_STATE_RX_OVERFLOW_BM     0x60
    #define CCxx00_STATE_IDLE_BM            0x00
    static INT8U RfGetRxStatus(void)
    {
     INT8U temp, spiRxStatus1,spiRxStatus2;
     INT8U i=4;// 循環測試次數
        temp = CCxxx0_SNOP|READ_SINGLE;//讀寄存器命令
     CSN = 0;
     while (MISO);
     SpiTxRxByte(temp);
     spiRxStatus1 = SpiTxRxByte(0);
     do
     {
      SpiTxRxByte(temp);
      spiRxStatus2 = SpiTxRxByte(0);
      if(spiRxStatus1 == spiRxStatus2)
      {
       if( (spiRxStatus1 & CCxx00_STATE_BM) == CCxx00_STATE_RX_OVERFLOW_BM)
       {
                   halSpiStrobe(CCxxx0_SFRX);
          return 0;
       }
          return 1;
      }
       spiRxStatus1=spiRxStatus2;
     }
     while(i--);
     CSN = 1;
        return 0; 
    }
     */
    INT8U halRfReceivePacket(INT8U *rxBuffer, INT8U *length)
    {
        INT8U status[2];
        INT8U packetLength;
     INT8U i=(*length)*4;  // 具體多少要根據datarate和length來決定
        halSpiStrobe(CCxxx0_SRX);  //進入接收狀態
     //delay(5);
        //while (!GDO1);
        //while (GDO1);
     delay(2);
     while (GDO0)
     {
      delay(2);
      --i;
      if(i<1)
         return 0;     
     }
        if ((halSpiReadStatus(CCxxx0_RXBYTES) & BYTES_IN_RXFIFO)) //如果接的字節數不為0
     {
            //LED2 = 0;
      packetLength = halSpiReadReg(CCxxx0_RXFIFO);//讀出第一個字節,此字節為該幀數據長度
            //if (packetLength <= *length)   //如果所要的有效數據長度小于等于接收到的數據包的長度
      if(packetLength == 0x08)
      {
                //halSpiReadBurstReg(CCxxx0_RXFIFO, rxBuffer, packetLength); //讀出所有接收到的數據
       halSpiReadBurstReg(CCxxx0_RXFIFO, rxBuffer, 8); //讀出所有接收到的數據
                *length = packetLength;    //把接收數據長度的修改為當前數據的長度
           
                // Read the 2 appended status bytes (status[0] = RSSI, status[1] = LQI)
                //halSpiReadBurstReg(CCxxx0_RXFIFO, status, 2);  //讀出CRC校驗位
       halSpiStrobe(CCxxx0_SFRX);  //清洗接收緩沖區
      // delay(2);
      // halSpiStrobe(CCxxx0_SRX);  //進入接收狀態
      // delay(20);
       //delay(200);
       return 1;
                //return (status[1] & CRC_OK);   //如果校驗成功返回接收成功
            }
       else
      {
                *length = packetLength;
                halSpiStrobe(CCxxx0_SFRX);  //清洗接收緩沖區
      // delay(2);
      // halSpiStrobe(CCxxx0_SRX);  //進入接收狀態
      // delay(20);
      // LED2 = 1;
                return 0;
            }
        }
      return 0;
    }
    
    void main(void)
    {
     unsigned char key1_flag = 0;
     bit key2_flag = 0;
     unsigned int key1_scan_cnt = 400;
     unsigned int key2_scan_cnt = 300;
     INT8U i = 0;
     INT8U leng =0;
     INT8U tf =0;
     INT8U TxBuf[8]={1,2,3,4,5,6,7,8};  // 8字節, 如果需要更長的數據包,請正確設置
     INT8U RxBuf[8]={0}; 
     CpuInit();
     POWER_UP_RESET_CC1100();
     halRfWriteRfSettings();
     halSpiWriteBurstReg(CCxxx0_PATABLE, PaTabel, 8);
     //halSpiStrobe(CCxxx0_SRX);  //進入接收狀態
     //setRxMode();
     while(1)
     {
         //setRxMode();
      delay(10);
         if(KEY1 == 0)
        {
       key1_scan_cnt--;
       if(!key1_scan_cnt)
       {   
        key1_scan_cnt = 300;
        if(key1_flag == 0)//判斷按鍵是否第1次按下
        {
         key1_flag = 1;//按鍵第1次按下標志位 
        }
       }
         }
      else
      {
       key1_scan_cnt = 300;
       if(key1_flag == 1)//判斷是否第一次按鍵動作松開
       {
        led1 = 0;
        led0 = 0;
        key1_flag = 2;
        key1_scan_cnt = 3;
        TxBuf[0] = 0x77;//第1個字節為0x77的數據幀,接收方收到后不需要返回應答
        while(1)
        {        
         halRfSendPacket(TxBuf,8); // Transmit Tx buffer data
         delay(100);    
         if(KEY1 == 0)//檢測按鍵是否第2次按下
         {
          key1_scan_cnt--;
          if(!key1_scan_cnt)
          {
           key1_flag = 3;//按鍵第2次按下
           key1_scan_cnt = 300;
           led1 = 1;
           led0 = 1;
           break;//當按鍵再次按下時退出長發狀態
          }
         }
         else//沒有第2次的按鍵動作
         {
          key1_scan_cnt = 3;
         }
        }
       }
       else if(key1_flag == 3)//是否為第2次的按鍵動作松開
       {
        key1_flag = 0;
       }
      }
     
         if(KEY2 == 0)
        {
       key2_scan_cnt--;
       if(!key2_scan_cnt)//確認按鍵正常按下
       {   
        key2_scan_cnt = 300;    
        key2_flag = 1;//按鍵第1次按下標志位   
       }
         }
      else
      {
       key2_scan_cnt = 300;
       if(key2_flag)//按鍵彈起
       {
        LED1 = 0;
        key2_flag = 0;
        delay(1000);
        TxBuf[0] = 0x88;        
        halRfSendPacket(TxBuf,8);// Transmit Tx buffer data    
        LED1 = 1;   
       }
        }
      leng =8; // 預計接受8 bytes
         if(halRfReceivePacket(RxBuf,&leng))
     // if(!GDO0)
      {      
      // leng =8; // 預計接受8 bytes
      // if(halRfReceivePacket(RxBuf,&leng))
       {
        if(RxBuf[0] == 0x77)//接收到的數據不需要返回應答
        {
         LED2 = ~LED2;
        }
        else if(RxBuf[0] == 0x88)//判斷接收到的數據是否需要返回應答
        {
         LED2 = 0;//接收數據正確,開接收指示燈
         LED1 = 0;//準備發送應答,開發送指示燈
         delay(1000);
         TxBuf[0] = 0x99;
         halRfSendPacket(TxBuf,8); // Transmit Tx buffer data  返回應答
         LED2 = 1;
         LED1 = 1;
        }
        else if(RxBuf[0] == 0x99)//應答數據
        {
         LED2 = 0;
         delay(1000);
         LED2 = 1;
        }
       }
      }
     } 
    }
    黑人粗大无码AV人妻一区